Micron Technology and Intel have announced joint production and shipments of what they claim to be the industry's first 4bits/cell 3D NAND technology. Leveraging a proven 64-layer structure, the new 4bits/cell NAND technology achieves one terabit (Tb) density per die.
The companies also announced development progress on the third-generation 96-tier 3D NAND structure, providing a 50 percent increase in layers. These advancements in the cell structure continue the companies’ leadership in producing the world’s highest Gb/mm2 areal density.
Both NAND technology advancements—the 64-layer QLC and 96-layer TLC technologies —utilise CMOS under the array (CuA) technology to reduce die sizes and deliver improved performance when compared to competitive approaches. By leveraging four planes compared to the two planes that currently exist, the new NAND flash memory can write and read more cells in parallel, which delivers faster throughput and higher bandwidth at the system level.
The 64-layer 4bits/cell NAND technology enables denser storage in a smaller space, bringing significant cost savings for read-intensive cloud workloads. It is also well-suited for consumer and client computing applications, providing cost-optimized storage solutions.
“With the introduction of 64-layer 4bits/cell NAND technology, we are achieving 33 percent higher array density compared to TLC, which enables us to produce the first commercially available 1 terabit die in the history of semiconductors,” said Micron's EVP, Scott DeBoer. “The move to 4bits/cell enables compelling new operating points for density and cost in Datacenter and Client storage,” said Intel.
Meanwhile, in a separate statement, Micron announced it had commenced shipments of SSDs built on quad-level cell (QLC) NAND technology.
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